By Mohan, Ned; Underland, Tore; Robbins, William
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1 Introduction In recent years, design methodologies for high-frequency and mm-wave circuits have attracted a lot of attention. In particular, research and applications on RF building blocks for 40 GHz to 120 GHz and beyond are increasing drastically . Existing RF IC synthesis methodologies, however, focus on low-GHz cases [2,3]. com M. Fakhfakh et al. ): Analog/RF & Mixed-Signal Circuit Sys. Design, LNEE 233, pp. 27–52. 1007/978-3-642-36329-0_2 © Springer-Verlag Berlin Heidelberg 2013 28 B.
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The ranges of the design variables are dinp, dins ∈ [20,150] , wp , ws ∈ [5,10] (all in μ m ). 85, the quality factor of the primary inductor Q1 > 10, the quality factor of the secondary inductor Q2 > 10. The output load impedance is 25 Ω , which is the input resistance of the following stage. The specifications of the input impedance (at 60GHz) are Re( Z in ) ∈ [10, 20] and Im( Z in ) ∈ [10, 25] ( Ω ), which is the required optimal load impedance of the driver stage. The optimization goal is to maximize the power transfer efficiency (PTE).
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